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Subject: Engr Tech Leadrshp (Grad) (ETLS)
CRN: 41455
Lecture
St Paul: Owens Science Hall 251
This course considers two closely related but distinct concepts in systems engineering, verification and validation. Verification is “The process of evaluating a system or component to determine whether the products of a given development phase satisfy the conditions imposed at the start of that phase.” (IEEE Standard Glossary of Software Engineering Terminology, Standard 610.12-1990.) Validation is the act of assessing the requirements, design, and development of a product to ensure that it will meet the user’s requirements, operational needs, and expectations at the time of delivery. Systems engineering verification and validation practices will be studied and applied in appropriate situations. Prerequisite: ETLS 508 - Systems Design
3 Credits